Modeling And Parameter Extraction Of Amorphous Semiconductor Thin Film Transistors

Amorphous silicon(a-Si) thin film transistors(TFTs) have been widely used in Active-Matrix Liquid-Crystal Display(AMLCD) and Active-Matrix Organic Light-Emitting Diode(AMOLED), due to their advantages of excellent uniformity, etc. O n the other hand, with the development of the manufacturing technique, amorphous In Ga Zn O(a-IGZO) TFTs, representing amorphous semiconductor TFTs become the focus for their high mobility, transparent, etc. However, the currently developing a-Si and a-IGZO TFTs still suffer many problems, such as the extraction of trap states both at the surface and in the film, definition of the threshold voltage, difficulty in combining models with material properties and so on. To solve these issues, more investigation should be carried out.In this thesis, a technique for extracting the density of states(DOS) of a-IGZO TFTs based on the combination of subthreshold swing and capacitance-voltage(C-V) characteristic is proposed. By using the Poisson equation, Gauss theorem and taking account of the nonuniform characteristic of surface potential along the channel, the variation of interface state density with the applied bias voltage is obtained from the C-V characteristic. It indicates that the property of the variation of interface state density Dit is similar to that derived in poly-silicon showing an initial flat region followed by a sharp rise with the gate voltage. Normally, the values of Dit are approximately of the order of 1011 e V-1cm-2. Subsequently, by integrating the derived density of interface states with the subthreshold swing, the energy distribution of bulk traps is determined. This means is simpler. Densities of both interface states and bulk states can be obtained simulta neously.Based on the double exponential d istributions of trap states in a-Si TFTs, series resistances are used to associate characteristic lengths of the source and the drain with trap states. By taking advantage of the Poisson equation and Gauss theorem, the expression of the threshold voltage distribution is obtained. It shows that in a-Si TFT with the increase of the distance between the point and the source, the threshold voltage decreased. At the same time, in the light of the previous investigations of trap states and the DC characteristics, the threshold voltage can be defined as the gate voltage when the degenerate conduction comes into existence, and then a physics-based method of threshold voltage extraction for a-IGZO TFTs is developed. The accuracy of the proposed model was proved by comparison with the measured data.According to the three conduction mechanisms that exist in a-Si TFTs,(i) hopping via localized states,(ii) hopping between localized states and the available extended states, and(iii) conduction in extended states, an analytical model is proposed to interpret the drain current behaviour. In addition, based on physical properties of the subthreshold leakage current which is principally caused by the thermal emission, a dynamic model for the subthreshold drain current of a-IGZO TFTs has been developed. It proves that the mechanism of subthreshold leakage current is the thermal excitation and the subthreshold drain current followed an approximately exponential dependence on time under a certain condition. Moreover, take advantage of the proposed definition of threshold voltage, a new static model for the drain current of a-IGZO TFTs has been presented.