Design Of Embedded Multichannel 10-Bit SAR ADC

The development of SoC(system on chip) promote the technology progresses of MCU, DSP, MEMS as well as the embedded analog-to digital converters. As the interface of analog signal in the nature and the digital signal that the computers can handle, embedded ADCs are involved in areas of communication, transportation, medical equipments, data acquisition systems industrial process control and so on. Embedded ADCs are already become a indispensable part of SoC.Consider the demand of small area, low power, easy to implement from SoC, design and implement of an 8-channel 10-bit ADC is described in this paper. Successive Approximation Register (SAR) is the configuration adopted. The whole system is divided into two parts: analog sub-system and digital–sub-system. The analog sub-system is consists of analog multiplexing, buffer amplifier, bias circuit, comparator and compound DAC. There into, buffer amplifier is applied of Rail-to-Rail structure, it can track the input signal from power supply to ground potential; Comparator used three-state, automatic zero, high-speed structure, it can not only achieve a high gain, but also reduce the transmission delay; A structure of equal-valued resistors and rationed capacitors assembled is adopted in DAC implement, which avoids the mismatch of big capacitors and the linear error caused by application of resistors. The digital sub-system is consists of SAR, which applied the dichotomy arithmetic; state machine, which controls the whole system to work among the states of SM_IDLE, SM_BUF, SM_FINAL and SM_CONV; the timing logic, which control the timing in different states. The power of analog sub-system is 3.3V, and the power of digital sub-system is 1.8V. Layout of analog part is full custom designed through 0.18μm technology of HeJian Company.