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Design And Realization Of A Test Platform For Video Signal Processing Chip

Posted on:2008-02-12Degree:MasterType:Thesis
Country:ChinaCandidate:S L YangFull Text:PDF
GTID:2178360245492070Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
As a format conversion device between the video source and the display equipment the video signal processing chip(VSPC) plays an important role in video display. This paper discusses the design process of a VSPC test platform based on FPGA. This platform has two main functions: a test platform to validate functions of our VSPC; a LCD TV display system based on FPGA.The core of the platform system is a FPGA burned with several video processing arithmetic. Analog video source signals are changed into standard digital video signals via a video decoder chip. Then these digital signals are sent to FPGA and dealt with by format conversion algorithms modules, which mainly include de-interlacing, scaling, and frame rate-up conversion. The output format signals from FPGA are 24bit RGB signals, which are changed into LVDS format and sent to the final LCD panel via a display controller chip. A MCU chip used as a controller sets registers value for the whole system.This paper focuses on the designing and debugging of the hardware part of the test platform. In the aspect of designing, the circuit schematic and a high quality PCB layout are carefully discussed. In the aspect of debugging, the test method, test approach and its related test program are introduced in detail. In the end, some test data are also given. After many times'test, a conclusion is get that, with high reliability, stability and flexibility, this test platform can absolutely meet the need.
Keywords/Search Tags:video algorithm, I~2C, EMC, hardware debugging, PCB
PDF Full Text Request
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