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Mixer Design For GPS Receiver

Posted on:2009-01-31Degree:MasterType:Thesis
Country:ChinaCandidate:X X YanFull Text:PDF
GTID:2178360242989872Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of wireless communication in recent years, Radio Frequency Integrated Circuit (RFIC), which is a crucial block of it, has become a focus of present study. The development of CMOS technology greatly improves the performance of the devices and makes it possible to substitute CMOS technology for the traditional GaAs and BiCMOS technology in RFICs. However, some second-order effects and substrate crosstalk etc. will also become more obvious, which brings much difficulty to the circuit design, and the most severe consequence is a reduction of the voltage supply, which causes that not all circuit topologies can satisfy the required specifications.The mixer is an important block in GPS receivers, and its performance has a direct influence upon that of the whole system and upon the demands of the system for other blocks. We use the three-order down-conversion mixers structure.To solve these problems, this paper presents a high performance, namely low voltage, low noise figure and high conversion gain, CMOS down conversion mixer. Based on the traditional Gilbert mixer, the proposed mixer makes improvements upon it, including the uses of ac-coupled complementary transconductor and threshold reference self-biasing circuit. Consequently, all performances of the mixer are effectively enhanced. This paper gives a detailed analysis of the proposed mixer, and adjusts the circuit parameters upon it to design three mixers. At last, this paper gives some suggestions on how to improve the performance of the mixer.This design is based on 0.18μm CMOS RF technology of SMIC, employing Spectre RF to accomplish the simulation and using Virtuoso Layout Editor to finish the layout design, and finally, last-simulation were accomplished. The main simulation results show that the first-order circuit's conversion gain of 13.3dB, noise figure of 8.9dB, the second-order circuit's conversion gain of 30.7dB, noise figure of 10.3dB, the third-order circuit's conversion gain of 58dB, noise figure of 4.3dB. All the circuits operate at the voltage supply of 1.8V. Meantime, the post-simulation had been completed.
Keywords/Search Tags:RFIC, mixer, ac-coupled complementary transconductor
PDF Full Text Request
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