Research On CMOS RF Linear Power Amplifier

At present, many communication systems utilize AM/PM combination modulations in order to improve the utilization ratio of spectrum. The power amplifier (PA) is one of the devices that have the worst linearity in communication system, whose non-linearity leads to the spread of spectrum into adjacent channels and deteriorates the ratio of error codes. On the other hand, CMOS process is the mainstream process from the aspect of IC manufacture. A single-chip CMOS power amplifier based on CMOS process can dramatically reduce cost and lay a foundation for realizing digital base-band parts and RF parts on a single chip in the future. Therefore, it has a significant economic and academic value to research on CMOS linear power amplifier.This dissertation focuses on the study of linearization techniques for PA and a low-voltage CMOS linear power amplifier (PA) is presented for 2.4GHz ISM-band short range wireless communication. A novel adaptive biasing is proposed and applied to the output stage of the two-stage PA, which dramatically increases the linear output power range as well as decreases the power dissipation at lower output power level. The influences of supply voltage, temperature, corner process and package are taken into account. Bonding-wire inductors and MIM capacitors are used to realize a fully-integrated PA. The PA is implemented with JAZZ Semiconductor CH25 3.3V 0.35μm Analog/RF process. The layout and package pattern are also shown in the paper.