Research And Design Of High Performance CMOS Power Amplifier In Wireless Communication

In recent years, wireless communication like mobile terminal, satellite navigation,and RF identification develops rapidly, these applications become indispensable inour daily life. The wireless communication transceiver application systems graduallyhave the trends of high integration, low power consumption and low-cost,. RF poweramplifier is the core module of the transmitter in the wireless communication system.The performance of the entire communication system is directly connected with thepower amplifier. Power amplifier fabricated in CMOS process is a great help toimprove system integration, reduce power consumption and cut down cost, how toimplement power amplifier in CMOS process has become a hot spot in both academicand industrial fields.The power amplifier circuit structures and the performance characteristics aredetailed analyzed in this paper, it is decided to use switching power amplifier whichfits the constant-envelop modulation according. Switching power amplifier has higherefficiency than the traditional linear power amplifier. Class-E power amplifier iswidely used because of its higher efficiency and easier implementation, but it cannotachieve adequate output power and efficiency at low frequency. In this paper, class-Etype matching is utilized at higher band(433MHz) while the amplifier is matched in anovel square wave way at lower(315MHz、230MHz)bands. In order to guarantee thecircuit stability, output switching transistor is implemented in Cascode structure, thecommon-source part is designed in thin gate oxide transistor while the common-gatepart is designed in thick transistor basing on circuit analysis. Digital power control isimplemented by digitally changing the size of output transistor which can realize bigpower control range of39dB and relative high drain efficiency at back-off power.The power amplifier is designed and simulated by Cadence Spectre software withstandard0.18μm CMOS process, and the layout is drew by Virtuoso tool. The layoutsimulation indicates that the power amplifier has a performance of20.35dBm,20.1dBm,20.45dBm maximum output power and45.42%,38.4%,40.75%peak drainefficiency in230MHz,315MHz,433MHz band respectively. The designed poweramplifier achieves multi-band, high output power, high efficiency and stableoperation. The tape out chip test shows that the power amplifier has a maximumoutput power of19.81dBm and biggest drain efficiency of41.6%.