Design Of High Resolution Low Power Sigma-Delta Modulator In Mobile Devices

Along with the continuous downscaling of feature size inCMOS manufacturing and the boosting development of mobileelectronic devices, the supply voltage of integrated circuitshas been steadily decreased in the recent decades. While thisadvancement brings remarkable performance improvement andpower reduction in digital circuits, it nevertheless presentsmore challenges to the design of analog circuits, especiallythe realization of analog modules with high resolution andperformance. For instance, Li battery and other rechargeablebatteries are widely used in mobile devices nowadays, whosevoltage will drop dramatically from the normal voltage duringthe end of their working cycle. Therefore, the integratedcircuits inside should still perform well under lower supplyvoltage, as well as reduce the power consumption to prolongthe working cycle of mobile devices. In addition, the limitedvoltage swing, the digital-analog compatibility, and otherissues make the design of analog circuits under low-voltagelow-power circumstances gradually become the key problem insystem realization.In mobile measurement devices, ahigh resolution low poweranalog/digital converter is indispensable, which transformsthe analog signals from the sensor into digital signals moresuitable for large scale processing. Recognized as thetraditional structure, the Nyquist converters can hardlyrealize a resolution exceeding 10 bits due to inevitablemismatch and various offset in the manufacturing process. Incontrast, the Over-sampling converters are gradually becoming the first choice of realizing high resolution converters byvirtue of the effective suppression to mismatch and offset,as well as in-band noise attenuation thanks to high samplingfrequency. Based on the Sigma-Delta modulator, theSigma-Delta analog/digital converter can realize the sameresolution with much less circuits, leading to a greatreduction in area and power consumption.This paper presents research on the design of highresolution low power Sigma-Delta modulators in mobile devices.The characteristics of Sigma-Delta modulation were analyzedsystematically, and the merits and demerits between differenttopologies of realization were comPared in detail. Then, thesystem design, simulation, and verification were carried outto realize a Sigma-Delta modulator with 16 bits resolutionunder 1.5V supply voltage and 1KHz signal bandwidth. As longas system performance was guaranteed, the topology with theleast power consumption was adopted to obtain an optimumbetween performance and power. The system level design wascomposed of the following aspects: selection of system orderand over sampling ratio, comparison between topologies,stability consideration, parameters setting, zerooptimization technique, and analysis of clock scheme.After the completion of the ideal system design, this paperanalyzed various non-ideal factors in Sigma-Delta modulatorsto obtain specific performance requirements on circuitmodules. The real system simulation was carried out to ensuresystem performance under the realistic environment. Thesystem non-ideal factors under investigation were: noiseanalysis, determination of sampling capacitors, eliminationof flicker noise, non-ideal factors of op-amp, clock jitter,shift of system parameters, and switch on-resistance, withall the performance requirements optimized for powerconsumption. The circuit level design of Sigma-Delta modulator includesbandgap reference, common mode voltage generator, operationaltrans-conductance amplifier, quantizer, and clock treegenerator. The circuit simulation was taken in CADENCE ICFBsimulation environment, under TSMC 0.35um standard processlibrary. According to the simulation results, the performanceof circuit blocks was satisfactory to system requirements.With a total power consumption of only 200uW approximately,the system achieved-120dB noise floor for quantization noise,which was in accordance with the system modeling.