Research On Search Strategy In CMP NUCA And Performance Analysis

Due to technology push and application pull, the Chip Multiprocessors (CMP) have become the trend of the high performance microprocessors. With the heavy contention for the limited memory resource on a single chip, the latency of memory access becomes the major Bottleneck of the CMP performance. Meanwhile, since the target workloads of CMP are diversified, traditional performance evaluation and simulation environments face new requirements. Thethesis focus is on performance improvement of the CMP cache-hierarchy——NUCA andmulticore simulation.For lessen the stress of multicore's memory access, CMP integrates large cache on chip to improve performance of memory hierarchy. This thesis has studied the NUCA technology to manage the large cache on chip, proposed a new smart search mechanism in CMP NUCA. Existing search mechanisms either entail high performance overheads or inordinate storage overheads. Our mechanism, based on Bloom Filter, is complexity-effective. It makes efficient use of transistors, and do not make changes to the baseline coherency protocols. It has the potential to reduce the performance and storage overheads of CMP NUCA implementations. It's promising on future work.With the development of microprocessor architecture and new application, full-system simulation will become a general tendency in micro architecture research and design. This thesis has studied multicore simulation technology with full-system simulation, carefully analyzed the realization of the simulator GEMS, on which we implement the improved NUCA model.