FPGA Of The Pattern Process Algorithm Realizes In The Real-time 3D Information Acquisition System

The 3D color information acquisition system can obtain the coordinate and color information of the object surface in the 3D space. It is important for computer vision and one of the research focuses in information technology。First, the importance of the 3D information acquisition is introduced and The whole scheme of real time reconfigurable 3D laser colour information acquisition system is present. It allots the image processing system task in reason and our design takes advantage of hardware and software effectively. The work principle of hardware system based on FPGA processor and the work time sequence flow of system are introduced.In this thesis, the digital logic design of video processing system is studied. The integrity and standardization design flow and methods are summed up. I bring forward the standardization methods which map the image process arithmetic to Programming Logic Device. The advanced design method which include parallel pipeline, circle structure is described.This thesis also proposes an adaptive threshold method based on alterable direction template for fast detecting the center of structured light stripe. The combination of the adaptive threshold method and the alterable direction template one made it superior and gave full play to the two methods. Experiments show that the method possessed the advantages of good stability, high precision, easy computing, less data throughput and fast implementation, etc. It can eliminate white noise and repair broken line and remain detail information of structured light stripe.Furthermore, it is convenient for the fast implementation of hardware. A video image-processing special integrate circuit for the real time 3D scanner is developed, which possess of independence knowledge property right by us. The ASIC is the system core for implementation of the key fast algorithms. The algorithms of extracting central line of laser stripe, head contour and central colour line from video image are accomplished by FPGA processor, which is made of EPEK50. In addition, the ASIC must do control function that includes data lock module, I/O control module for FIFO and other signal control modules that is required by system. The data lock module can translate the video capture port signal into true colour RGB signal. A interactive fast algorithm of extracting the head contour has been proposed for real-time image processing, which is accomplished by FPGA processor and host computer together. The development of ASIC is the most important to the whole system.