Research And Design Of Front-end Circuits Of UHF RFID Reader

The research and development of UHF RFID reader and tag are driven by the application of UHF RFID system in recent years. In China, the study of UHF RFID system is in the start-up stage. In particular IC design foundation is weak and there are a few intellectual property rights on this area. On the other hand, the research of the low-power analog circuit is poor in domestic and this will directly affect the chip's overall performance and the distance of acquiring data of reader. Therefore, this study is of great practical significance.Theoretical analysis about UHF RFID system and the RF front-end structure of reader are analyzed theoretically in this thesis. At first, the RF front-end architecture of reader is determined based on the analysis of RFID protocols and standards. The reader RF receive demodulator circuit adopts low-IF architectures with IQ branches. This architecture restrains the DC-offsets and easily integrated. Secondly, compared with all kinds of mixer circuits, Gilbert circuit has been chosen for mixer circuit, one of the key part of the reader RF receive demodulator, by taking some trade-off factors, such as loss, linearity, noise figure, gain and other factors into account. A novel RF trans-conductor is proposed and applied to the mixer, which dramatically increases the linearity as well as decreases the power dissipation and noise figure of the mixer. The mixer circuit was optimized and designed based on SMIC 0.18um process. The simulation shows that circuit's 1dB compression point has reached -5.13dBm, gain is 5.38dB, noise figure is only 6.99dB, RF-IF isolation is -79.61dB, LO - RF isolation is -136.56dB and LO - IF isolation is -105.96dB. The layout of the circuit was completed.