Research Of Topology Reconfiguration For Fault-tolerant And Dead-lock Free Routing Algorithm In Network-on-Chip

With the nanometer technology's developing steps speed up in the 21st century, electronic components' characteristic size reduces continuously. In the beginning period, it was 65nm and it will reach into 22nm in the future. From this, it can be seen that the rapid development of integrated circuit's fabrication technology pushes the promote of integrated degree on a chip. Therefore, the SoC which based on the bus structure can not bear thus complicated circuits and communication. In fact, SoC's bus structure is the barrier of SoC's development. Therefore, in the end of 1990s, some researchers transplanted the communication model of large-scale network into the communication on chip, and have proposed a brand-new communication model on a chip-NoC (Networks-on-Chip). NoC can solve the problems of SoC with communication model. Therefore, NoC can be the best communication model after the SoC.The whole thesis introduces the development background of NoC, the research in China and aboard and related foundational knowledge. Secondly, at the base of present research, we have done two-sided researches.(1) Aiming at fault problem on communication architecture, we have made thorough research on communication architecture of NoC. A kind of topology reconfigurable hardware architecture has been proposed. When many routers on a regular 2D-mesh become faulty, the whole topology becomes irregular, and it makes difficulties at routing. Although, a kind of fault-free routing algorithm has been designed, the efficiency of routing decreases due to the irregular topology. Through the additional topology reconfigurable hardware architecture on the regular 2D-mesh Network-on-Chip, the physical irregular topology has been reconfigured to a logical regular topology. Then the simple deterministic routing algorithm can be used for routing, and it decreases the complexity of routing.(2) The routing problem based on irregular 2D-mesh Network-on-Chip have been researched. For special system in practice, larger IP cores bring that the irregular region bechance, a kind of virtual topology reconfigurable routing method has been proposed. Firstly, the irregular topology becomes regular through virtual reconfigurable method that regards larger IP region as a rectangular faulty-region with many faulty routers. For the architecture after virtual reconfigure, the designed routing algorithm applied on it and is free-deadlock without virtual-channel.