Research On Parallel Seam Sealing Process For LSI

In today, the technology has developed very fast, and the world has met the information time. The electronic information has not only great changed people's method of living and working, but also become one of the important signs for the embodiment of national power strong or not. The semiconductor integrate circuit is the footstone of electronic information technology. At present, the package, test, design and manufacture technology of the semiconductor integrate circuit make up to the three stanchion of semiconductor industry.In 1947, the American invented the first transistor. At the same time, the history of semiconductor package had been started. With the unbroken development of semiconductor package technology, the package mode is more and more diversification. The parallel seam sealing is an electronic packaging technology developed in 1980s for DIP metal packages. Compared with other hermetic sealing forms, the ability to control the rate of package heating is the main advantage, which makes parallel seam sealing particularly suited to hermetic sealing of optical packages. It can control the lowest temperature of the package and the least camorimpact of the chip and the agglutinative. Developing to today, this technology has abroad been a kind of mature package craft, but the domestic development still has much localization. The parallel seam sealing equipment can only be used in single sort.The parallel seam sealing equipment is model M2400e, witch was manufactured in American SSEC company. This equipment has automatic aim system, and can seal many sorts of package. Based on the M2400e parallel seam sealing, this paper introduces the sealing theory in the process of LSI packaging. Otherwise, it describes how to compile a process, and the problems that mast be pay attention to. As the emphasis, the paper detailed the problems of process during the experiment, the reasons of the problems and how to solve the problems.