High-Voltage MOSFETs Based On CMOS Processes

The increasing integration density of VLSI (Very-Large-Scale-Integrated) circuits and the low-power requirements of complex signal processing applications, force the continuous reduction of the power supply voltages in modern ICs (Integrated Circuits). While the low-voltage CMOS (Complementary Metal Oxide Semiconductor) technologies implementing these ICs are optimized for speed, minimum power consumption and maximum integration density, they cannot meet the requirements of system applications where High-voltage capabilities are needed. When electronic signal processing involves High-voltage and/or high-current, different solutions are presented according to the power level of the application.In present dissertation, an introduction of several normal High-voltage IC structures, also analysis and research of structures which are compatible with conventional CMOS technologies were carried out. The compatibility between High-voltage technology and conventional Low-voltage technology and the modification to Low-voltage technology was discussed. Based on a 1.5μm 5V CMOS technology, High-voltage processes were integrated into it as new process modules. Process parameters were defined by wafer-test. Device parameters of Low-voltage devices were kept unchanged as much as possible. DDD (Double Diffused Drain) and SVX (Smart Voltage eXtension) structures was taped out and had a wafer-test. At last, a set of Design Rules compatible for 5V/12V voltage range was given out.