The Establishment And Research Of Scalable Macromodel For High Voltage MOSFET Ⅰ-Ⅴ Characteristics

Nowdays, with the development of the high-voltage integrated circuits (HVIC) process and the advancement of the compatible process between high-voltage (HV) MOSFET and low-voltage (LV) module, it is prevalent to integrate HV devices into power IC, such as driver circuit, interface circuits and power management circuits. So, the HVMOS has been researched more and more deeply. The HV Double-Diffused Drain MOSFET (DDDMOSFET) is a typical HVMOS that is widely used. Its process is simple and compatible with the traditional CMOS technology, so the cost is low. In general, the operating voltage of DDDMOS is between 14V and 35V, which can meet the requirement of the medium high-voltage circuits.Since the IC design and fabrication rely increasingly on the EDA software, the absence of HVMOSFET model becomes a big obstacle in circuit simulation. Many groups have attempted to model HV MOS transistors with different structures by different approaches. However, an industry standard model for HVMOS that can be supported by general EDA software has not been established.In the work, it is found that the simulated and experimental data of DDDMOSFETs are obvious different during the I-V simulations with the BSIM3 model. The simulated value of Ids is much larger than measured value at the high voltage bias.According to the distortion of the BSIM3, a scalable macromodel based on SPICE BSIM model is presented in this paper. The HVMOSFETs with DDD structure have been taped out with 0.35um 14V CMOS technology. And the data of different dimension devices have been collected by Agilent HP4156 system, Cascade probe station, and ICCAP software. The three device geometries are large dimensions (W=20μim, L=20μm), narrow dimensions (W=1.8μm/2μm/5μm, L=20μm), and short dimensions (W=20μm, L=1.2μm/1.5μm/2μm/3μm/5μm).In the paper, the special mechanism of HVMOSFET has been analyzed according to the measured curves, such as quasi-saturation effect. And a scable macromodel for HV DDDMOSFET is presented. The macromodel has many features. It is composed of regular SPICE devices, such as general NMOSFET, MESFET, and diode. The structure of the macromodel is simple and convenient to use. It can describe the I-V characteristics accurately. Moreover, since the macromodel subcircuit devices derive from SPICE model, it can be widely used in general simulators and EDA software. The practicality and compatibility of the model has been improved greatly.In the research, the method of parameter optimization has been adopted to realize a scalable macromodel. The MESFET parameter K1 (threshold voltage sensitivity to bulk node) is extracted as a function of channel dimension (W/L), thus achieving the optimization of the model for variable dimension HV MOSFETs.