The Design And Implementation Of A Simulating Verification Platform For YHFT DSP

As the microprocessor's scale and complexity keep growing, functionalverification become the bottleneck of microprocessor design. Functional verificationcan discover failures in design flow early, which greatly reduces loss. Simulation is stillthe main vehicle for functional verification. But the generation of test program forsimulation manually get very low efficient, and it is not suitable for microprocessor'sverification.YHFT DSP is a 32 bit floating-point DSP using VLIW architecture which isdeveloped by the National University of Defense Technology. It has comprehensiveinstruction set and powerful functions. To verify it thoroughly and efficiently is a hardwork. We study the primary system verification methods and analyze their advantagesand disadvantages. Based on the fully understanding of the function and construction ofYHFT DSP, a scheme from module to instruction and then to system verification ispresented.In module level according to the characteristics of the function unit underverification, we separate the unit's function into two aspects, the controllable functionand arithmetical function, and use different stimulus generation strategy to verify them.Because of the complexity to control related signal and to stress on the state transition,we use constraint randomize generation to drive the function unit directly forcontrollable function. For arithmetical function we use direct generate in instructionlevel to handle its enormous data. In both means we use the function coverage drivenverification method to improve the verification efficiency.In instruction level, after analyzing the difficulty of the verification's requirement,we decide to build a verification platform based on instruction model. We set up ahierarchical and modularized framework of the verification platform. It clarifies everylevel's operation and defines the interface between high level and instruction model. Wecode YHFT DSP's instruction model according to the system criterion and theplatform's interface standard, and use it to verify the system function.In system level we connect some necessary device's behavior model outside theYHFT DSP to set up the verification environment. In the environment we implementthe device's behavior model, configuring the parameters automatically, loading thesimulate programs automatically and improve the efficiency greatly.