Passive Devices Modeling And Power Integrity Analysis In High-Speed Circuits Design

ith development of Semiconductor technic, the scales of transistors andtransition time of digital signals are becoming more smaller, which lead to more seriousproblems arouse in signal integrity(SI) or power integrity(PI) in today's high-speedcircuits design. Signal integrity's problems may cause or directly bring about signaldistortion, wrongly timing, incorrect data, as well as working wrongly of the system,and even system's collapse. Therefore, for the high speed system, the signal integritymust be fully taken into consideration.The signal integrity in the design of high speed digital circuit is analyzed andresearched in detail in this paper. The main contents are as follows, first, introducingsome passive devices, analyzing their effects on SI and their models which could beused in a lower frequency domain, for it is an important method of solving signalintegrity problems to build model and carry out simulation of circuit in reasonable way,those models could be used in SPICE simulation, which can simplify the analysisprocedure; second, analyzing the factors that cause PI problem, especially thesynchronous switching noise, ground bounce, and so on. Based on some circuit design.Through PI simulation tools of Ansoft, Parts of Its PDS (Power Distribution System)are optimized; finally, introducing a newly EBG (Electromagnetic and Gap) stackstructure, which can be used to decrease the SSN caused by incorrect PDS design, Theperformance of a PDS with EBGs and decoupling capacitors is compared to designswith only decoupling capacitors, EBG structure could achieve SSN suppression foreven a wider frequencies.