The Power Integrity Analysis And Electormagnetic Interference Study In System-In-Package

With the vastly boosting demands of human beings for electronic products, the new trends of miniaturization, multi-function, high-integration and environmental protection are playing a key role in the microelectronic packages evolvement. System-in-Package (SiP) is the main role on this stage. The high speed, high density, high power consumption, low voltage and high current propose a significant challenge towards the Power Delivery Network (PDN) and Power Integrity (PI) which are critical to the quality of products where market demand happens.This thesis digs into the Power Integrity analysis, Power Delivery Network design and near field coupling effects within the 3D SiP package. The keystone is the study of structure design of PDN, as well as wide-band, high isolating depth and new 3D shielding configuration. The contents and results are concluded as below:1) Based on the previous research work, the characteristics and related technical issues have been discussed according to the PDN noise source and SiP PDN design application. The problems to be specially noticed in target impedance method are also presented including adaptive target impedance method when current changes with the time and noise coupling considerations with multi-chip target impedance method etc. Focus on package design, especially 3D mixed chips stacking system, the relations between PI, Signal Integrity (SI), Electromagnetic Interference (EMI), and fabrication processes are illustrated theoretically, and the collaborative designs are discussed, such as a high density, high power consumption, low cost ASIC package and 3D mixed chips stacking.2) With the issue of Simultaneous Switching Noise (SSN) in high density, high power consumption or high speed digital circuit, the low impedance design of the package level PDN is studied. Firstly, the power/ground resonance and low input impedance with method of cavity model is discussed. The voltage fluctuation coming from the connction structure is discussed with the ciruit analysis and elctromagneitic simulation. Equivalent circuit schematic is built for typical connection structure, combining the Electromagnetic simulator results in fitting circuit parameters, to approach the lower connection inductance. The low impedance of low inductance and high capacitance are also applicable in the practical package design.3) The noise suppression in SiP PDN design is another main issue in this thesis. To solve the noise transmitting coupling problems in PDN, a novelπ-type Low-Pass-Filter (LPF) structure is proposed and corresponding circuit model is built and discussed. The new device has the merits of simple structure, low-cost, wide suppression bandwidth, compatible with current process etc. and is very suitable for SiP PDN design. The novel designedπ-type LPF structure is applied in high-speed multi-chips PDN design and implements the-40dB isolation from 0.3GHz to 10GHz, and lower than-70dB within different powering systems with frequency from DC to 10GHz. When PDN is treated as the signal return path, any discontinuous points lead to mismatching of transmission line and degrade the signal quality. The newπ-type LPF and return path via design is applicable in package PDN design, and is validated to provide very low noise return path.4) Besides the Electromagnetic interference (EMI) problem caused by edge radiation on baseboard due to the PDN resonance, the near field interference problem, which is focoused on in this article, within 3D mixed chips stacking is also severe. The thesis equivalents the current return paths among the transistors to be the current ring, and qualitatively analyses the inductive coupling between mixed chips or chip and bonding wire. Accordingly a new 3D shielding structure applicable for shielding near-field inductive coupling is proposed. This structure has the merits of shielding noises, thermal relief and compatibility with the modern shielding materials and processes. The sensitive chip is placed at the bottom of the stacking structure because the bonding wires with sensitive signals are shortened. The isolation of the structure is up to 150dB, and at certain point of frequency, the extraordinary 240dB can be achieved.