A High Linear CMOS Up-Conversion Mixer

As the Cable Television in China has begun to be digitalized, Digital TV has shown us its promising future. Tuner is the front-end of DTV, so it plays an important role in DTV technology. Since the superheterodyne receiver was invented, mixer has long been the research focus in communication and radio frequency circuit fields, which is the key component to realize the frequency translation. This paper begins with the comparison of single-conversion receiver and double-conversion receiver architectures, from which we can find the background and the necessity of using an up-conversion mixer in DTV tuner.We introduce the theory, classification and topology of mixer at first. Then we explain the -1dB compression point and IIP3 of mixer by analyzing an ordinary nonlinear system. We also explain the conversion gain and noise figure of mixer as well. This paper presents the topology of the up-conversion mixer based on the requirements of the tuner system, which includes a mixer core, an LO buffer and an IF buffer. After a brief introduction to the main techniques to improve the linearity of mixer, we select Gilbert Mixer with source degeneration as the mixer core. We also present the mechanism of using source degeneration to improve the mixer's linearity and its circuit design as well. Special attention is paid to the tradeoff among linearity, gain and noise figure. We also introduce the key elements in the band-width design of LO buffer and the adjustable tail-current source of IF buffer. Meanwhile, we analyze the gain and linearity of Gilbert cell and the main noise sources of it. We also give the methods of optimization.This paper introduces the key point in the analog layout design and presents the layout of up-conversion mixer. We complete the simulation of the mixer due to different frequencies, temperatures and process corners based on Chartered 0.25μm RFCMOS process. Simulation result indicates good performance with 4dB conversion gain, +12dBm IIP3 and 16.5 SSB NF. The gain variety is less than 1dB within 50~860MHz range, and the total power consumption is about 155mW. The up-conversion mixer is manufactured and packaged. We design the test system. Based on the current condition, we test the chip and good frequency-mixing is observed.