Single Bit Signal Processing System Based On ∑△ Modulator And The Design Of A Passive Wideband ∑△ Modulator

With the rapid development of digital signal processing (DSP), the Single Bit Signal Processing (SBSP) technique based onΣΔmodulator has been made some application. Unlike the multi-bit signal, all the information of the signal can be described with only one bit bit-stream. Compared with the multi-bit signal processing, some advantages can be got if the bit-stream is processed directly. The first one is the internal wires connecting different parts of the circuit can be reduced, the physical area for routing the signal will be smaller, and the different delays, the interactional interference can also be avoided. The second one is the arithmetic processing blocks (such as the adder, the multiplier) based on theΣΔbit-stream are very simple, and are implemented easily. Therefore, it is a good way to reduce the IC's cost and to improve the speed of the circuit.In this thesis, the theory of the single bit bit-stream generated byΣΔmodulator was introduced firstly. Although only 1 bit quantizer (comparator) is used in the modulator, a very high resolution can still be reached by the over-sampling and noise-shaping techniques. Subsequently, the thesis summarized and designed two kinds of adders and three kinds of multipliers. For each of them, the results for time domain and frequency domain's simulation are shown and compared, which indicated that the second adder and the third multiplier have the best excellent performance.The circuit's implementation of theΣΔmodulator is a hot topic of the integrated circuits design. The performance of the classicalΣΔmodulator built with active integrator will be affected by the operational amplifier seriously, and it is difficult to process the wide-band signal。Generally,the band-width is less than 10MHz. A wide-bandΣΔmodulator based on the passive filter was put forward in this thesis. The whole system was analyzed in Matlab and the circuit using this method was accomplished. The simulation indicated that the band-width can be broadened to be 10MHz, and the Dynamic Range can reach 67dB and 44dB respectively. The layout of the circuit was designed with TSMC 0.18um CMOS technology, and the power is 14.5mW when the power supply is 1.8V.