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Research On CMOS Image Sensor Pixel And Processing Circuit Optimization

Posted on:2015-03-16Degree:DoctorType:Dissertation
Country:ChinaCandidate:Q SunFull Text:PDF
GTID:1228330452459975Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
In the past decades, thanks to the rapid development of CMOS technology,CMOS image sensors have achieved large-scaled promotion. But as the CMOStechnology advanced to the deep sub-micron or even nanometer level, the non-idealfactors on the process of CMOS image sensor also gradually highlights. How toenhance the integration density in the use of technology progress while improvingCMOS image sensor’s performance becomes a research hotspot. This paper mainlyaims at the key issues such as dark current increase, dynamic range reduction due tothe decrease of CMOS technology feature size.This paper begins with the design improvement of4T active pixel. On the basisof the analysis of the key factors affecting the full well capacity (FWC), this paperfocuses on the influence of photodiode capacitance, and proposes solutions to seriousleakage current of PPD caused by high potential of FD. Secondly, based on theimproved4T CIS rolling exposure timing control circuit, this paper proposed adual-time interlaced exposure control method. At the same time this paperdemonstrates a real-time calibration method of dark current in CMOS image sensorand an edge-preserved Retinex algorithm, targeting on darkcurrent FPN suppressionand color image enhancement respectively. Finally, the above-mentionedimprovements implemented in0.18μm CMOS process are tested, and the test resultsare analyzed and compared.The main and innovatory results are as follow.1. In order to increase the full well capacity of four-transistor pixel, a p-typeinjection layer is added between the pinned photo-diode and floating node to stabilizethe FWC. Adding the p-type injection layer can significantly reduce the leakage ofphoto-generated electrons from the photodiode potential well to the floating node inthe integration period. The test results show that under different process conditions,FWC can be increased significantly.2. For the industry generally used method of obtaining a high dynamic rangeimage by two frames combination, this paper proposed a dual-time interlacedexposure control method. Compared to the conventional rolling shutter exposure control, this dual-time interlaced exposure control method can take the max use of theexposure time allowed3. This paper presented a real-time calibration method for dark current in CMOSimage sensor, targeting on darkcurrent FPN suppression. And fixed pattern nosieintroduced by dark current is suppressed and the characteristic of CMOS image sensoris improved.
Keywords/Search Tags:CMOS Image Sensor, Dynamic Range, Dark Current FPN, Dual-time interlaced exposure control
PDF Full Text Request
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