Study And Design Of The High Stability Phase-Locked Dielectric Resonator Oscillator

With the development of the modern wireless communication, the local oscillator with higher quality, such as low phase noise, highly pure spectrum and highly stabilization, is required in the mobile communication, radar, guided weapon and electronic counter. Dielectric Resonator Voltage Controlled Oscillators (DRVCOs) are widely applied in microwave oscillators because of their excellent phase performance, spectrum purity and stability. At present, reflect-in series and parallel-feedback are two common types of DRVCOs, and the phase noise of the latter is better than the former. The thesis is to study and realize 5.915 GHz high stability Phase-Locked Dielectric Resonator Oscillator (PLDRO), the main achievements of this work are summarized as follows:1,Dielectric Resonato(rDR)and the basic applications of the circuit are introduced, through emulator three methods for DR modeling are discussed in detail, which is as partial work of DRO design.2,the theory of several types of dielectric resonator oscillators is discussed father. The structure of reflection circuit can consist of GaAs FET and feedback network with DR. The amplification circuit and the feedback network are independent in this structure, so it's very easy to design and fabricate such a oscillator,also it establishes foundation to realize PLDRO.3,the fundamental theory of Phase-Locked Loop(PLL)is studied, including phase model of PLL system and loop's dynamic equation from time domain and frequency domain, studied performance of stability and phase noise which combining standard system control theory, and given graphic analysis of optimal selection loop's bandwidth. Based on analysis of the theory can get loop structure of PLL and loop's bandwidth.4,the design of voltage controlled dielectric resonator oscillator including two parts is discussed. One is selecting active device and circuit structure, the other is the procedure of emulator design, including the design of offset circuit, negative resistance parts and the design of complete circuit, and then the simulation result can be obtained. Through plate-making, it can debug with DRVCO. Meanwhile, the design of PLL, mainly for loop filter, is also introduced. After all that, it can connect DRVCO with PLL and debug them. There are some differences between test result and simulator result. The possible reasons are as follow: the design of micro-strip circuit is not precision, there are some differences between the actual size of micro-strip line and projected dimension, harmonic frequency of dielectric resonator is not near 5.915 GHz, the...