The Design Of High Quality K-Band Phase-Lock Oscillator

With the development of satellite communications,the high quality frequency sources are widely used. In these areas, one of the most important performances of frequency source is phase noise. A low phase noise frequency source will improve the performance of the communication system, such as bit error rate, receive sensitivity etc. In this paper, the design of a K-band phase-locked oscillator is presented. It uses sub-harmonic sampling phase-lock loop and push-push Dielectric Resonator Oscillator (DRO) of high quality factor to suppress its phase noise. First, this paper introduces the background and block diagram of this frequency source, and then introduces the scheme of the sub-harmonic sampling phase-lock loop and push-push DRO. Finally it gives the analysis of phase noise and experiment results. It shows that if the same VCO and reference source are used, the phase noise of the sub-harmonic sampling phase-lock loop will be lower than that of a direct division phase-lock loop. The out-band noise of frequency source is determined by that of VCO itself in loop, therefore the overall phase noise performance will be improved, if high quality factor VCO is used. The low phase noise potential of K-band VCO using NPN silicon-Germanium transistor with low noise floor, high cut-off frequency (70GHz) and high collector current capacity has been studied in detail. It also shows that, compared to fundamental oscillator, the push-push structure presented here can suppress phase noise further, making it much attractive in millimeter wave applications.