Development Of An Ultra-High Speed Data Acquisition System Based On FPGA

The Data Acquisition is an important part of Digital Signal Processing, which is widely used in radar, communications, nuclear detection and so on. When the technology of FADC (Flash Analog to Digital converter ) and FPGA (Field Programmable Gate Array) is developed, the Design and Realization of High Speed Data Acquisition System become feasible.This paper discuss a High Speed Data Acquisition System based on FPGA. The system achieves a sampling rate of 800Msps, and converts the high speed LVDS signals to low speed LVTTL signals using FPGA. And the FPGA implements the amplitude discrimination and obtains time information. Then FPGA sends the data to the TELL1 readout board. The TELL1 board sends the data to the Gigabit Ethernet with the Gigabit Ethernet link.The design of high speed circuit is different from the low speed circuit. We should care about the SI (Signal Integrity), PI (Power Integrity), EMI and so on. This paper introduces the rules of the design of high speed circuit. The high density FPGAs can realize complicated design of timing and logic. It suits the applications of high-speed, high-density digital circuit. The paper detailedly introduces the design, simulation and programming of the FPGA.At last, this paper analyze the performance of the High Speed Data Acquisition System.