A Research On Magnetic Flux Leakage Data Sampling And Compression Algorithm

Because of its economical, effective and safe characteristics, pipeline is one of the most important means of transportation, especially in the petrochemical and natural gas industry. The pipeline may have defects because of the long time erosion, abrasion and high pressure. The pipeline MFL (Magnetic Flux Leakage) detecting method which have mature technology, broad applicability and utility is applied almost everywhere. The large amount of data which is produced by higher demand of detection speed and measurement precision will exceed the processing ability, which must be improved.FPGA(Field-Programmable Gate Array) is characterized by high speed, high integration level and programmable on line etc, and has very high flexibility and stability. This thesis uses the Spartan II array XS2S100-PQ208 from XILINX corporation. DSP(Digital Signal Processing) is a microprocessor with special structure, providing real time and fast realization of various digital signal processing algorithms. This thesis adopts the TMS320C5509 from TI corporation.In order to enhance system performance, this thesis conducts some research on data sampling and compression. The design is divided into two parts: high speed multi-channel data collection and data compression. As the core of the high speed multi-channel data collection unit, FPGA provides time order to control high speed analogue multiplexers and A/D to sample the multi data which will be transmitted to data compression unit. As the kernel of data compression unit, DSP compresses the real data using one order embedded zero-tree coding. This algorithm can process these data rapidly ,and be realized on DSP, which can be stopped at any moment.Through lots of experiments, the process of data collection and compression can satisfy the time requirement and decompressed data can replace the raw data for storage.