Design And Implementation Of Forward Error Correction Code In Optic Network

Nowadays, high speed optic network are greatly used along with the development of communication technology. There is an extremely limitation for optic signal transmission in the systems because of attenuation, chromatic dispersion and crosstalk. To guarantee the reliability of the data transmission in a high speed long distance of optic networks, the ITU (International Telecommunication Union) recommended to adopt Reed-Solomon (255,239) code as the forward error correction code in the standard ITU-T G.975. They also recommended that one should use couples of encoders and decoders in parallel for higher speed systems based on the 2.5 Gb/s Reed-Solomon (255,239) encoder and decoder.Reed-Solomon (RS) code is a kind of Bose-Chaudhuri-Hocquenghem (BCH) code. Therefore, it is also a kind of cyclic group codes. It is widely used because of its simple structure and excellent performance. It can correct both random errors and burst errors.The coding design and structure optimization of 2.5 Gb/s Reed-Solomon (255,239) encoders and decoders is discussed in this paper. A testing platform based on FPGA is designed and the coding of Reed-Solomon (255,239) encoder and decoder is validated and improved on this platform. Simultaneously, the design flow of semi-custom application specific intergeted circuit is also studied. EDA tools of Synopsys Design Compiler and Avanti! Apollo were used in the design flow along with the link-to-layout methodology to design the 2.5Gb/s Reed-Solomon (255,239) encoder and decoder semi-custom ASIC layout. The layout was designed by using a TSMC 0.18μm CMOS standard cell library supplied by Artisan, and is verified in post-layout simulations. At last, a resource sharing method of the key-equation-solving block is introduced to design a 10 Gb/s Reed-Solomon (255,239) decoder.