Data Acquisition System For Multiple Encorders Based On FPGA

In this dissertation, the part of signal acquisition of the four fold-frequency subdivision,direction-judgment,counting and flip-latch of the data which come from the six encorders is investigated in detail.First of all, based on the study of the current situations internally and externally, the development of the Encoders ,the subdivision of the Encoder signal, the basic ideology of PAL,and the theory of universality PAL are expatiated.And then, aiming at the deficiency of conventional design, the high-compositive FPGA (Filed Programmable Gate Array) chip is used as the core in this project to deal with the signal of six Encoders in real time. The four fold-frequency subdivision,direction-judgment,counting and flip-latch of the data which come from the six encorders are totally transacted in the FPGA chip. The final data are sent to the PC through the serial interface of the FPGA. After that, the hardware circuit, especially some of the key parts, is investigated in detail.The following processes are also investigated in detail: empoldering the four fold-frequency subdivision,direction-judgment,counting and flip-latch of the data with VHDL (Very High Speed Integrated Circuit Hardware Description Language); empoldering the serial interface and the data collection software in PC with Borland C++ Builder. To confirm the feasibility of the Data Collection System, a series of experimentations are adopted.At last, the prospect of multi-articulation arm CMM in the market is pictured, and some suggestions are put forward for how to improve the signal collection system.