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The Research And Implementation Of RSA Cryptographic Algorithm IP Core

Posted on:2007-06-28Degree:MasterType:Thesis
Country:ChinaCandidate:J B KuangFull Text:PDF
GTID:2178360185966603Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
As the development of digital communication and e-business, People's requirement of information security is getting stronger. People develop various crypto-systems to prevent the information from being stolen and illegally modified. Public-key cryptography algorithm such as RSA, ECC and DSA plays an very important role in modern crypto-system.RSA algorithm is the most typical public-key cryptography algorithm. Nowadays RSA is used in most encryption and digital signature product and standard, its security is based on the difficulty of the factorization of large integer. People have not yet found an efficient method to solve the integer factorization problem. So RSA is believed to be a secure algorithm. Since the modular exponentiation operation which has a modular of 512 to 1024 bits will causes a heavy load of general purpose CPU, the software implemented RSA algorithm will be very slow. To be fast, we propose a VLSI implemented RSA algorithm accelerator IP using Montgomery algorithm.The RSA algorithm and Montgomery algorithm are introduced first. Then two modified methods are proposed. The 4-2 CSA based Montgomery algorithm can eliminate the carry propagation of large integer addition. It has a low crucial path delay and avoids the conversion of temporary variables. The algorithm is projected to the systolic array which eliminates the global broadcast of data and control. The signals are transferred only in the adjacent processing units. The systolic array increases the processing parallelism and is very suit for the design of VDSM. The CSA unit is rearranged at the Boolean level. It decreases the crucial delay by 36%. The function definition and structure partition are finished with the top-down design method. The soft core of RSA algorithm is depicted with Verilog HDL and the behavior simulation is achieved.
Keywords/Search Tags:RSA algorithm, modular multiplication, Montgomery algorithm, IP core
PDF Full Text Request
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