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Design Of Parallel I/O System In Massively Parallel Supercomputers

Posted on:2006-07-30Degree:MasterType:Thesis
Country:ChinaCandidate:J Y WangFull Text:PDF
GTID:2178360185463293Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
How to solve the I/O bottleneck problem efficiently has always been a key technology under research in high-performance parallel computer systems. In order to implement high-performance computing and scalability of computing, communication and I/O performance, the system must have an elegant architecture, advanced I/O interconnect and high-performance system network.With the development of high-performance parallel computer I/O system and I/O interconnection technology, our study is focused on advanced massively parallel I/O system architecture, parallel I/O key technology and I/O interconnection technology in this paper.The achievement of the research mainly including:1. A distributed shared parallel I/O system based on independent I/O node is proposed, and its key technology has been researched thoroughly, focusing on hardware design of parallel I/O system. Theoretically, We have analyzed the quantity of I/O node and the reasonable configuration of I/O node in parallel I/O system based on independent I/O node.2. We also have studied the key technologies of hardware design and I/O latency hidden technology to enhance parallel I/O performance.3. High-performance serial I/O interconnection technology—PCI Express is researched in detail, including PCI Express system architecture, interconnection protocol and its key implement technology.4. The design of high-performance I/O server based on PCI Express is completed. Theoretically, We analyzed how configure quantity of the disk and the memory capacity of individual I/O node to satisfy the system performance. At last, we researched thoroughly the design and the implement of the I/O node controller and PCI Express-to-PCI/PCI-X bridge chip based on PCI Express.
Keywords/Search Tags:parallel I/O, parallel I/O Architecture, I/O Interconnection, PCI Express
PDF Full Text Request
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