The Study On Dedicated Architecture And Versatile Architecture Design In Video Codec Chip

Video compression technology is not only necessary but also feasible for the storage and transmission of multimedia information. A series of video coding standards established by the international standardization organization make the application of video compression algorithms greatly successful. The newest international standard H.264 and national standard AVS (Audio Video coding Standard) provide high compression efficiency, and they will have wide application in digital TV broadcasting, multimedia communication, and so on.The rapid development of VLSI technology makes the chip implementation of video codec possible. Video codec chip can be considered as a system that consists of many modules. Modules used to implement compression algorithm can be divided into two kinds: dedicated architecture and versatile architecture, in light of compatibility for multi-standard or multi-algorithm. Dedicated architecture is only suitable for one algorithm of one standard, while versatile architecture is suitable for multi-standard or multi-algorithm. Versatile architecture is usually implemented with programmable or configurable method.The paper studies the dedicated and versatile architecture in video codec chip from the design methodology, summarizes the common design methods, and gives example to explain the application of array process, look up table and reuse design. In light of processor style, instruction parallel and data distribution, the paper introduces the versatile architecture design respectively, and emphasizes the application specific instruction set processor and configurable versatile architecture.Take the residual process module in AVS video encoder chip as an example, the paper discusses the design strategy for dedicated architecture. A high speed, area-efficient dedicated architecture design to implement (inverse) transform and (inverse) quantization is proposed. It can satisfy the requirement of real-time encoding for 720x576@25Hz video format at 108MHz.A versatile multi-core programmable video codec architecture is also proposed. The implementation of transform and quantization of both AVS and H.264 is discussed, based on co-processor and configurable architecture, respectively. According to hardware implementation results, dedicated architecture and versatile architecture are compared in the view of both speed and area.Based on the highest degree of match between algorithm and circuit, dedicated architecture has high efficiency and low hardware cost. Based on the consistency of coding scheme, versatile architecture is flexible, expandable, but it has higher hardware cost at the same time. Generally speaking, dedicated architecture has faster process speed than versatile architecture.Both dedicated and versatile architecture in video codec chip have their own advantages anddisadvantages. Which one to choose should be decided with the consideration of specificapplications.