Research And Development Of Power Management In SoC Systems

The great growth in the density of integration and core frequency lead to the huge increase in the energy consumption in integrated circuits, and thus bring the problem of energy consumption of ICs to a new era. SoC systems are built from IPs (Intellectual Property) rather than single transistors. Because of the continuous down scale of pitch size, in the number of IPs integrated by SoC systems also follow the Moore's Law like transistors. This not only lead to more complex systems, but also notable increase in power consumption.In order to fulfill the destiny of SoC systems in embedded systems, and even battery-powered systems, the hardware designing techniques used to reduce power consumption in circuits is not enough. A new system design method so named "Dynamic Power Management" is introduced. But the old-fashioned turning system into low power mode is not enough today.This thesis presents a power management system suitable for the CKM510X SoC system co-developed by Zhejiang University and Hangzhou CSKY Microsystems Co., Ltd. Three technology including DFS (Dynamic Frequency Scaling), DVS (Dynamic Voltage Scaling) and Clock gating is introduced. DFS allows system to run at a lower frequency when less throughput is required. DVS enables the system to run in a lower supply voltage when the system is running at low frequencies by controlling the off-chip converter. The clock gating system can turn on/off the clock signal of all modules in the SoC system without affecting other modules.The thesis described the basic concepts, flow, and important notes of the power management system applying the three techniques. Power consumption tests are run to prove the availability and high efficiency. The power management system reduced the power consumption of the system, and makes a good example.