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Design Of Amplifier With Ultra-Low Quiescent Current

Posted on:2006-03-20Degree:MasterType:Thesis
Country:ChinaCandidate:H FanFull Text:PDF
GTID:2178360182961699Subject:Computer applications
Abstract/Summary:
Due to the advances in the fabrication process field of integrated circuits, the component density and the overall power dissipation of the high performance VLSI chips increase continuously. In particular, the explosive proliferation of battery-powered equipment in the past decade has accelerated the development of low-power-consumption low-dropout (LDO) voltage regulators, which has intensified the focus of designers on optimizing the performance of the amplifiers. Nowadays, foreign enterprises almost occupy the whole market of power management IC, so it is necessary to dominate such a potential market. Therefore, it is of great significance to research and develop domestic power management. Moreover, it is of great importance to study the LDO linear regulator circuit. Supported by National Science Foundation of China and Sichuan Province Academic and Ttechnologic Leaders Foundation, we have held deep research in power management chip. The typical application of the chip includes the Mobile phones, Wireless communication equipment, PDA, portable equipment, Battery powered equipment. In this paper, an error Amplifier applied to a low dropout (LDO) linear voltage regulator has been designed. The chip is manufactured by BiCMOS process. Moreover, this amplifier reaps the benefit of incorporating foldback current limiting circuit, which enables the Low-Dropout (LDO) voltage regulator without the need of special current limiting subblock, therefore, the object of ultra-low power is realized because of great reduction in transistors and current limbs.In the first part, this paper introduces the background and significance of this research. In the second chapter, single stage amplifiers are narrated. After that, on the basis of the prior knowledge, we have successfully design an error amplifier. HSPICE simulation results which includes CMR (common mode input range), differential mode input range, Power Supply Rejection Ration (PSRR), common mode Rejection Ratio (CMRR) and so have shown that the amplifier only consumes about 0.6uA quiescent current.
Keywords/Search Tags:Power Management, LDO, Error Amplifier, HSPICE, quiescent current
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