The Design Of Low Quiescent Current LDO

With the rapid development of integrated circuit industry, integrated voltage regulatorshave a broad market and prospect. As a member of them, Low Dropout Regulator (LDO) iswidely used in advanced portable devices because of its simple structure, small size and lownoise characteristics. At the same time, with its strong research significance, LDO has becomean indispensable module of the power management chip.A low quiescent current LDO is designed in this paper. Firstly, according to the designrequirements, the schematic diagram of each module is designed, including a referencevoltage source, an error amplifier, the over-temperature protection circuit, the samplingfeedback resistors and the pass device. Especially, the error amplifier is a critical module. Thequiescent current and the power consumption of the chip can be effectively reduced by thedesign of the push-pull output amplifier designed in this paper. Secondly, analyze eachmodule circuit qualitatively and quantitatively. Each module circuit is verified by Spectre.Finally, integrate each module circuit and simulate the whole circuit. Besides, makeadjustments and modifications until reaching the original design target.After the circuit design, the next step is the appropriate layout design. By getting familiarwith layout design rules and process, the layout can be designed and drew with Huayue3um40V bipolar process document. In order to reduce the layout area and save the cost, the layoutneeds to be optimized without affecting the overall performance after design. Through theDRC（Design Rule Check）and LVS（Layout Versus Schematics）check, we can finally verifythe correctness of the design layout.