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Laker And Hspice Software-based Power Management Chip Design

Posted on:2009-08-11Degree:MasterType:Thesis
Country:ChinaCandidate:T ZhangFull Text:PDF
GTID:2208360245461864Subject:Software engineering
Abstract/Summary:PDF Full Text Request
Switching regulators have been widely used over the world for the virtues of high integration level, efficiency. With more cost effective, lower component count switcher solution, and so on. Recent changes in electronic systems are forcing higher levels of integration in switching power supply chips. The most notable requirements are those involving size, weight and energy efficiency. New government energy-efficiency programs are further reshaping switch-power-supply designs.With the development of the SOC scale, the system power dissipation must be attenuated to ease the pressure of power IC include power manager, meanwhile develop the corresponding high quality power supply management IC, which consists of sensor, control, driver and supply, it can integrate further control (time serial logic, DSP and its solidify arithmetic) and protect circuits, to realize smart control with stronger function. Due to involved in power system, single on chip power system faced more difficulty and had particularity。The paper proposed a new power supply management Integrated Circuits(IC) based on single crystal silicon, which is compatible with high and low voltages technology. It makes the supply, sensor, control and large scale driver integrated on a chip. Current limit State Machine and Auto-restart Counter have been designed to protect chip and lower dissipation,too。The fundamental principle of switching regulator including :PWM,PFM and PSM, and the structure of power switch are firstly introduced in this thesis, next, the global system architecture is proposed upon the design requirements and sub-block circuits are also introduced. This paper focuses on several essential sub-blocks such as Osc, Over_temperature , VREF and so on. Current limit State Machine and Auto-restart Counter have been designed to protect chip and lower dissipation. Finally, all sub-circuits and the whole chip circuit are simulated and verified by Hspice and Laker. The results indicate that the circuit function and performance have perfectly satisfied the design requirements.
Keywords/Search Tags:PWM, PSM, PFM, Current limit State Machine, Auto-restart Counter
PDF Full Text Request
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