Study On The Key Techniques Of SiGe/Si Heterojunction CMOS

The major advantage of SiGe technology is that energy band engineering and strain engineering have been introduced into Si device and IC. The conduction band and valance band discontinuities allow systems to be designed where electrons or holes may be confined in quantum well. The hole or electron mobility may be promoted utilizing strain effect produced by epitaxial growth technique for SiGe or Si pseudomorphy. SiGe technology can maintain the economic predominance of state-of-the-art Si technology for it is compatible with the latter. It has been noticed and investigated widely.Separate strained Si channel n-MOSFET and strained SiGe channel p-MOSFET with high performance have been fabricated using the characteristics that electron mobility of tension strained Si and hole mobility of compressive strained SiGe are higher than counterparts of body Si. But it is very difficult to integrate n-MOSFET and p-MOSFET into the same layer structure, because electron and hole transport in different material and structure of grown layer needed is different.Aim at the problem, SiGe/Si heterojunction CMOS (HCMOS) with strained Si and SiGe channel are studied. The cardinal structure and principle of different devices are analyzed, including surface-channel, buried-channel, modulated-doping and dual channel strained Si or SiGe MOSFET. The key techniques of relaxed SiGe Virtual Substrate (VS) that reduce dislocation density are discussed. The advantages and disadvantages in several SiGe/Si HCMOS structures are compared.A novel strained SiGe/Si HCMOS architecture with common gate is proposed on the above groundwork. The structure consists of buried-channel strained SiGe p-MOSFET and strained Si n-MOSFET arranged in a vertical stack. Both have only one Poly-Si_1-xGe_x gate. Unlike previous proposals, the design uses the same planar layer structure for p-MOSFET and n-MOSFET. Furthermore, there is no need to implant well and etch active layers, technologically compatible with Si. The area of device is half of Si CMOS and performance improved greatly.On the basis of strained Si and strained SiGe material physical models built, the novel SiGe/Si HCMOS are demonstrated with two-dimensional computer simulation by MEDICI. DC steady, AC small signal and transient characteristics of the device are researched. The relation between structural and electronic parameters, such as threshold voltage, cut-off frequency, transconductance, drive current, is deeply discussed. The effect of layer structure proposed on better performance of device is revealed. For...