Design And Implementation Of FPGA Partial Dynamic Reconfigurable System Based On Software Communications Architecture

Software Communications Architecture (SCA), which can be used to implement an open, standard, modular software radio platform, can obviously reduce the development cost of software radio platform and obviously improve the application flexibility. Along with the performance and technique improving of FPGA, FPGA takes the greater dominant place in SCA system. How to integrate FPGA waveform into the SCA system seamlessly and how to improve the portability of the FPGA waveform become the hot topic and nodus of researches.In this paper, we do some researches on dynamic partial reconfigurable techniques based on SCA communications system, which is built on a FPGA-based platform. And we propose a scheme of dynamic partial reconfiguration for FPGA waveforms running on SCA systems. We build an SCA testbed capable of dynamic partial reconfiguration, and based on this testbed we design and implement two kinds of waveforms with capability of reconfiguration, which proves the feasibility and validity of the scheme proposed in the paper. Our work mainly includes four aspects, as follows.The first part introduces the relevant techniques, theories and research situation of reconfiguration used in SCA systems. The partial dynamic reconfiguration techniques based on FPGAs is current research hot topic, and also the focus of this paper.According to SCA systems, the second part of our work proposes the dynamic partial reconfiguration techniques based on EAPR (Early Access Partial Reconfiguration) for SCA waveforms, and issue the design rules, constraints and resolution of common problems.The third part analyzes the key technology to implement a partial reconfiguration system in SCA architecture, including the container and ORB engine structure, the connection of busmacro and OCP interface, the design of static module and SCA dynamic waveforms. Otherwise, the technology used to reduce the time expended in reconfiguration process such as bitstream compress and buffer is also introduced in this part.The fourth part describes the SCA-DPR waveforms demonstration and verification system and system infrastructure. It makes a highlight introduction of partial dynamic self reconfiguration system's mechanism and its process of design and implementation. According to the DPR technology and EAPR flow, we design two reconfigurable SCA waveforms. Finally, by loading and running these two waveforms under SCA core framework, it proves the partial reconfigurable system proposed is compatible with SCA, and shows the advantages of DPR techniques.