Research On Hybrid NAND Flash Experimental Platform

Flash memory has been invented by Toshiba company in 1980s. It has many specific properties, such as power economic, shock-resistant, high speed, non-volatile, shock-resistant, and small size. In recent years, with the capacity increasing and price decreasing, flash memory becomes the strong challenge to the traditional magnetic disks. Nowadays, flash memory has become the most important second-level storage devices which used widely in the personal computer and enterprise servers.With the emergence of new flash based applications, flash memory data management technology has become one of the hottest research focuses in recent years. The researchers dedicated to two aspects to explore the new solutions and algorithms. The first one is to improve the algorithms in the DBMS level。The other one is to take advantage of fast read and slow write characteristics to improve the algorithms in the SSD. Meanwhile, another problem aroused the attention of the researchers. How to evaluate the performance of the flash memory data management algorithms becomes more important. At present, two schemes are proposed to solute this problem. The first one is to use the main memory of the computer to simulate flash memory and the second is to use the commercial SSD to evaluate the algorithms. The former is cost economic and flexible, but the majority of the soft just fit to the algorithms proposed by the proposer. The other researchers could not use them. The latter is convenient but high cost. Based on the SSD the researchers can get the performance of the algorithms exactly. But the internal structure and the flash translation layer of the commercial SSD are totally transparent to the researchers. They could not run the experiments such as the internal buffer management algorithms, FTL, wear-level algorithms and so on. For the reason that building an united flash experimental platform is significant .To resolve the problems that the current evaluate platforms encountered, in this dissertation, we proposed a hardware/software integrated flash memory experimental platform. Moreover, this platform is configurable, totally open and can be used flexibly. The main work of the dissertation can be summarized as follows:(1) We design and implement a hardware/software integrated, high performance, flexible platform. It consists of flash memory storage board, flash translation layer and flash memory driver level. This platform provides and experimental environment for both DBMS-level and SSD-level algorithms. Such can meet the majority of the requirements of the flash memory evaluate experiments.(2) We proposed a high performance write buffer management algorithms based on the SSD named BPCLC. We run the experiments on the flash memory management platform proposed above. As the result shows, BPCLC is better than the other algorithms and this platform is competent to all kinds of flash memory algorithms.