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Reconfigurable computing for algorithms in hyperspectral image processing

Posted on:2008-06-05Degree:Ph.DType:Dissertation
University:University of Maryland, Baltimore CountyCandidate:Hsueh, MingkaiFull Text:PDF
GTID:1448390005456237Subject:Engineering
Abstract/Summary:PDF Full Text Request
This dissertation investigates the applications of hyperspectral image processing algorithms in recently reconfigurable DSP systems. To date, engineers have been using the Field Programmable Gate Array (FPGA) as the core processing element of most reconfigurable computers. These FPGA-built processing elements completely avoid the instruction-fetch, load/store bottlenecks of the conventional von Neumann architectures in most general purpose processors and DSP processors. FPGA-based systems truly achieve parallel processing, executing algorithms based on the inherent parallelism of the hardware. In addition, FPGAs are far more scalable into the higher throughput realms because of their dedicated logic for I/O functions which is of particular importance when dealing with data from sensor imaging systems. In this dissertation, two hyperspectral image processing algorithms, Adaptive Causal Anomaly Detection (ACAD) used for anomaly detection and Block-of-Skewer based Pixel Purity Index (BOS-PPI) for endmember extraction will be investigated. Each of them demonstrates different level of challenging tasks to be resolved in the reconfigurable computing environment. For the ACAD algorithm the major challenge of its FPGA implementation is the calculation of the inverse of correlation matrix in near real-time. Since Hyperspectral image data are collected by hundreds or thousands of spectral bands, their large scale sample correlation matrices require a vast amount of time to calculate its inversion. In order to cope with this problem, the QR-Decomposition based matrix inversion is implemented via the COordinate Rotation DIgital Computer (CORDIC). In addition, the Matrix Inversion Lemma (MIL) is also used to reduce the computational complexity induced by the near real-time matrix inversion computation. As for the Block-of-Skewers based PPI, its FPGA implementation is focused on systolic array design due to its inherent parallelism. Several different block designs will be implemented and compared in this dissertation. The FPGA design in this research work sets a stage towards future development of new reconfigurable systems for on-board and real-time processing of many hyperspectral image processing algorithms.
Keywords/Search Tags:Hyperspectral image, Reconfigurable, Algorithms, Systems, FPGA
PDF Full Text Request
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