NoC Mapping Based On GSA Algorithm

In recent years, due to the chip based on bus structure that brings some problems, researchers apply network design technology to chip design process, and presents a piecein order to solve the network that cannot be solved by bus structure, so as to improve the module reusability, enhance the system scalability and flexibility, ideas which referened from system of computer network. Integrating more large-scale circuit in a single chip is the ultimate goal for designing NoC description. Power, speed and area is the important factors of designing NoC description. With the development of nanoscale technology, power consumption is already an important constraint.NoC description design portable hand-held devices, especially products such as mobile phone, PDA, power consumption,has become the bottleneck of such product design.How to reduce the power of communication network chip has become a concern for designers of NoC description.NoC description mapping is to point to the relationship of position between interconnected in their NoC description network topology structure in a given network topology structure, application task graph description, IP core library and design constraints (power consumption, delay and area, etc), on the basis of appropriate for each task, and according to the IP core task graph to determine the execution of the IP core task and then decided to order has been chosen IP nuclear.According to chip network design of the low power consumption mapping problems, the paper proposes a new method for the optimization of lower power consumption after researching and analysing low power consumption modelr -- based on genetic simulated annealing algorithm of optimizing, it embedes simulated annealing into genetic algorithm,which uses simulated annealing to optimize individual, and then optimize groups by the genetic algorithm. This algorithm is good at reducing power of communication consumption of the system and can accelerate convergence speed in meeting communication delays.