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The Study Of M-LVDS Based Multi-bits Serial Networked Instrument Bus

Posted on:2011-12-20Degree:MasterType:Thesis
Country:ChinaCandidate:Y G AFull Text:PDF
GTID:2178330332984533Subject:Mechanical and electrical engineering
Abstract/Summary:PDF Full Text Request
The existing instrument buses cannot simultaneously satisfy the request of multi-hosts communication, high data transmit rate, timely transmission and simple connection interface. Aiming at the deficiencies of the popular instrument buses, design scheme of a new networked instrument bus is presented in this thesis. This new design include two independent media access channel,8-bit width parallel data transmission, CSMA/BA(bitwise arbitration method) technology, as well as synchronization and trigger implementation of networked instrument bus.The thesis is divided into seven chapters.In chapter one, compares the popular instrument buses, and concludes the respective advantages and disadvantages. Then, based on CSMA/BA technology, a networked instrument bus scheme is presented.In chapter two, describes hardware system design of the networked instrument bus. First, the design scheme of the bus architecture is determined. Then, the signal integrity design of high-speed digital circuits is discussed.In chapter three, expounds the design of the bus protocol, including the physical layer and the data link layer. All aspects of bus protocol, including layer definition, frame structure, bus timing and acknowledgment, frame filter, error detection etc.In chapter four, several patterns of hardware trigger bus prototype are introduced, and IEEE-1588 precise time synchronization protocol is implemented within networked instrument bus to overcome the limitations of hardware trigger bus.In chapter five, describes the implementation of the bus manager with-FPGAs. The bus manager executes the functions of the data link layer.In chapter six, the experiments of the instrument bus are presented, involving the coincidence test and co-operation test, the test of bus communication functions and the test of bus communication performance, and test of time synchronization protocol accuracy.In chapter seven, summarizes the whole thesis, and gives expections for further research.The innovation in this thesis is:present the design spirit of the network-stye instrument bus founded on the CSMA/BA technology, and independently design the bus protocol with full use of it, which meets the thirsty requirements of high performance instruments such as real time signal analyzer in data signaling rate, real time capacity, etc.
Keywords/Search Tags:instrument bus, signal integrity, bus protocol, bus arbitration, time synchronization, trigger bus
PDF Full Text Request
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