Design And Application Of 13 Bit Low Power Consumption Sigma-Delta Modulator

With the rapid development of integrated circuits, the conversion between analog and digital plays a more important role. Among many ADC, Sigma-Delta ADC improves SNR (Signal to Noise Ratio) and reduces the noise in output signal band efficiently by adopting over-sampling and noise-shaping technology. Therefore, the power is reduced. Compared with traditional Nyquist converters, Sigma-Delta ADC decreases the requirements of analogue circuit's performance specification and device accuracy, simplify the design of analog circuit, and reduce the cost of manufacturing. Currently, there is comparatively high power (>10mW) in high resolution Audio Frequency∑△ADC Converters, this paper design a modulator with 13bit resolution and less than 330μW power consumption based on analysis of the trend of∑△ADC.This paper analyzes the modulator's shaping of the quantization noise, discusses several common ADC of Nyquist structure, compares the system design of various Sigma—Delta modulator. After the comparison, 2nd-order modulator has been implemented and non-ideal factors have been analyzed and main circuit blocks have been determined. The design of cascade amplifier, comparator, two-phase non-overlapping clock signal has been finished, parameter of these circuits has been confirmed, the design, simulation and layout design of these circuits under Cadence have been completed. Problems encountered in layout design have also been expatiated.By adopting the XFAB BCD process with 0.35~μm, N-well, 2P/3M to simulate under the condition of 3.3V power supply, 32kHz sampling rate, 128 oversampling rate, the circuit simulation indicates that the SNR (signal to noise ratio) is about 80db, power consumption is about 330μW , which meets the design specification of 13 bits low power consumption Sigma-Delta ADC modulator.