Analysis On Interconnect Power Consumption Taking Into Account Process Variations

With the rapid development of VLSI technology, interconnect process variation has become a very important factor impacting the design and manufacture of integrated circuits.This paper concentrates on the impact of interconnect process variations on the interconnect power consumption in VLSI. Approximate functional relationship expressions are obtained through the analysis of the impact of interconnect geometric parameters variation on the interconnect parasitic parameters, On the basis of this, statistical models of RC interconnect power consumption, RLC interconnect power consumption in the presence of process fluctuation are built respectively. Analytic expressions of mean and standard deviation of interconnect power consumption can be obtained for given fluctuation range of interconnect technological parameters using the models proposed in this paper. The computation results show that the time of calculation is greatly shortened with good calculating precision using the method proposed in this paper as compared to the widely used Monte Carlo method. The method proposed by this paper has a potential bright future in the analysis and optimization of VLSI interconnects power consumption.