Design Of Module And Interface For Hardware Simulation Platform Of Deep Space Communications

Deep space communication is featured with large transmission delay and complicated communication environment. Therefore, compared to normal ground communications system, deep-space communications systems has higher requirement of design and implementation. Thus, it is necessary that a proper simulation platform should be applied before the beginning of the design. But the current studies of deep-space communication simulation platforms are very limited, which urges us to establish an appropriate simulation platform for evaluating performance of deep space communication systems.This thesis describes a hardware implementation of deep-space communication simulation platform. On the basis of theoretic analysis of the general characteristics in deep space communications system, we first build an overall design of hardware simulation platform based on ADSP-TS201S and Virtex-II Pro FPGA hardware architecture, and then implement the function modules of source coding and high-speed communication interface between DSP and FPGA by designing of FPGA internal timing. In this platform, the chip of ADV202 that is based on JEPG2000 standard is used to implement the module of source coding of multi-spectral image and the chip of ADSP-TS201S is used to implement the modules of the channel error correction coding, modulation and demodulation for coded source data. The platform works in a fast speed and strong flexibility. Finally, the performance of the system is analyzed by comparing the PSNR of reconstructured images at the receiver. The results show that the performance of the system reached the expected target and requirements.