Research And Implementation Of SoC Testability Structure

The systems-on-chip (systems on chip, SOCs) are gradually becoming the mainstream of the integrated circuits and the developmental tendency of international VLSI circuits presently today. A single chip can be integrated by a lot of complex modules to accomplish more complex functions. We have to use a large number of standard pre-designed IP blocks in SOC to reduce the time-to-market. With the scale and complexity of SOC increasing, a higher request to the SOC test was put forward. When the IP core has been integrated into the SOC, its input and output ports will be embedded into the SOC, have become unpredictable. How to access the IP cores and the surrounding logic by the input and output ports of SOC is the the major work of SOC test.And, how to design a SOC testability structure which can be used to complete the SOC test by a shorter time, thereby reducing time to market and lower test cost, is the key issue that must be resolved in SOC test.In this paper, the structure test of system-on-chip is modeled based on ITC '0 2 test benchmark circuits with the in-depth study of the IEEE std 1500. At the same time, the idea of hardware /software co-design is used for the division and design of hardware and software in SOC test, and division of TAM and optimization of the wrapper correspond to IEEE std 1500 were studied. The system of SOC chip-level testing based on test reuse of IP cores has designed and implemented according to the demand for testing. Finally, we take SOCd695 which is one of recognized ITC'02 SOC test benchmarks as test subject to finish the SOC test by the hardware design of wrapper, and the software design based on macro commands used in test scheduling and test access.From the simulation results and experimental data, we can see that that the design of hardware and software in the testing system has achieved the intended design goals. We have improved the test efficiency and reduced the test time. We can achieve the practical level as long as the test system can be perfect in the future.