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Intelligent Power Design For Electronic Toll Collection System

Posted on:2011-11-10Degree:MasterType:Thesis
Country:ChinaCandidate:W B ZhangFull Text:PDF
GTID:2178330332465971Subject:Integrated circuits
Abstract/Summary:PDF Full Text Request
During the development history of electronic system, higher performance and low power is always the most important target. In modern days, low power takes more efforts in the design cycle of embedded system. For instance, power is one of the main cost for portable embedded system which are powered from battery. Traditionally, improving performance always takes cost of bigger power lost. It provides a global challenger and choice for the embedded system designer. That is how to trade off the relationship and contradiction between performance and power cost and how to design methods with implemented solution for smart power management.This paper takes the basis on ETC system, provides a solution for intelligent power design of on board unit (OBU).The idea for the solution is to select the advanced CMOS IC for intelligent power manager and make the system dynamic shift form sleeping mode and working mode. The system actives the moment it detects wakeup signals and jumps into working state in very short time. After the completion of the task, system will cut off power and go into sleeping state. The system also take smart strategies such as level management for difference block and time partition power management. These strategies are more infective for this kind of embedded system which only works somehow. And it also can improve the usage of battery. This paper also shares the design schematic of the intelligent power and PCB implementation board.
Keywords/Search Tags:Embedded systems, Low power consumption, Power management, Level management, Time partition power management
PDF Full Text Request
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