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The Research Of Digital Audio Codec System Based On FPGA

Posted on:2011-04-27Degree:MasterType:Thesis
Country:ChinaCandidate:C LvFull Text:PDF
GTID:2178330302462069Subject:Detection Technology and Automation
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Nowadays,digital audio signal processing is widely used in the internet streaming media,mobile equipment and digital broadcast area.In order to solve the bottleneck problem of digital audio data storage and transportation, data compression becomes a critical research subject in today's digital audio processing area. Among so many compressing standards, MP3 format is the most popular audio format used on PC, internet and PDA because of its best compromise between excellent quality and algorithm complexity.Now, MP3 is not a new technology. Today many corporations are not concerned about how to realize MP3 but about how to realize it on a low cost platform. This makes the hot topic of how to optimize the original MP3 standard, which is also the value of this thesis.In the MP3 coding/decoding process, IMDCT is the heaviest and most time-consuming computation part (another time-consuming component is integrated filters). Therefore, the speed of IMDCT determines the speed of the whole MP3 decoding process. Among so many schemes of the decoding process, the speed of special decoder chip is the fastest. Special decoder chip such as FPGA or ASIC, with parallel processing structure, is particularly applicable to make high performance digital path processor, such as digital filter, fft, discrete transform etc, and constitutes the key parts in the high-performance dsp system. This thesis is mainly to study the principle of MP3 encoding algorithm and the realization of the IMDCT module based on FPGAAt the beginning, the thesis introduces the development and major classifications of audio algorithm and the standard of MPEG audio encoding. It lays emphasis on the MP3 coding/decoding standard and process and the general algorithms for IMDCT.The writer selects the method of recursive loop which is fit for hardware realization, and makes improvement on the basis of algorithms available, weakening the required hardware source demanded and maintaining the computing speed. Then the paper puts forward the design of the entire module, and realizes with EDA tools:design the module, synthesize, simulate, and download.And finally implemented the design with EP2C35F672C8 of Alter Cyclone II series., While limiting the hardware source, IMDCT is realized swiftly. It is verified that this module functions successfully.
Keywords/Search Tags:audio codec, mpeg-layerⅢ, imdct, recursive algorithm, fpga
PDF Full Text Request
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