Arithmetic Research And FPGA Implementation Of IMDCT In MP3 Audio Coding/decoding

Recently, with the rapid development of multi-media technology, the mutual inosculation and infiltrating between electronics, computer, communication and entertainment becomes more and more, and the digital audio technology is one of the most widely-used technology. As a plan for digital audio coding and decoding, MP3 (MPEG-1 Audio LayerIII) is very popular in the domain of portable multi-media products.Among the existing implementation plans of portable MP3 system, SOC design with a low-frequency CPU/RISC and a specific hardware have the advantages of both hardware plan and software plan. It is not only low cost, but also adapted to multifarious applications and easily upgraded by both software and hardware. IMDCT is one of the most computation intensive and high frequently- used process, and is fit for the hardware implementation to decrease the burden and power cost of the central processor, and to improve the system performance.In this thesis, we first study the MP3 coding/decoding standard and the flow of MP3 coding/decoding process. Then the general algorithm for IMDCT is introduced, we select the recursive architecture which is fit for hardware realization, and make improvements on the basis of research in existence. Next we put forward the entire module design plan, and realized with EDA tools: design the module, synthesize, simulate, and download. And finally implemented our design with xc2vl000 device of Xilinx VirtexII series, we successfully verify this module have the right function.