Study Of Algorithms For Low Bit-rate H.264 Video Coding And Research Of Hardware Realization

H.264, also known as MPEG-4 Part 10: Advanced Video Coding, is the latest MPEG standard for video coding. It provides approximately 64% bit rate savings for equivalent perceptual quality compared to MPEG-2 standard and provides about 39% bit rate savings compared to MPEG-4 ASP. In the same fashion as previous MPEG standards, only the bit stream syntax and the decoder are specified. Hence, coding performance is not only determined by the standard itself but also by the implementation of the encoder. In this thesis two methods are proposed for improving the coding performance while remaining fully compliant to the standard. At the same time, the hardware implementation of H.264 codec is studied in this thesis. To aid study of algorithm for H.264, a software tool has been created to visualize the coding process and present statistics. This tool is written with VC++6.0. It is capable of playing video sequence, displaying information such as bit distribution, motion vectors, predicted pictures and edge information.Intra-coding uses prediction, transformation and encoding methods in H.264 standard. There are many prediction modes that improve the efficiency of intra-coding. But more time is consumed by intra-coding compared to previous standard. This makes it difficult to be used in real-time applications of video compression. In this thesis, a fast algorithm for judgment of intra-prediction mode is given on the basis of edge information of video frames The algorithm is implemented in H.264 reference software. After tested with video sequences, it proves that the time for intra-coding reduces 50%~60% with very little degrade of PSNR.Lagrangian optimization for video compression has proven to yield substantial improvements in perceived quality and the H.264 Reference Software has been designed around this concept for high performance and low bit rate. When performing Lagrangian optimization, lambda is a crucial parameter that determines the tradeoff between rate and distortion. The value of lambda is only related to quantization parameter QP in H.264 reference software, so the best optimization cannot be obtained with different video sequence. After the analysis of global optimization, a new method is proposed to select lambda for non-reference P frames in H.264, which can adapt the content of video sequence and produce better compression.Video coder is implemented with ASIC or digital signal processor previously.FPGA is not used because of its limitation of hardware resource. But the calculating speed of digital signal processor is slow and the development cycle of ASIC is too long. FPGA is reusable and it is flexible to be changed since it is configured with EEPROM. It can be upgraded just by changing the content of EEPROM. With the extension of resources in FPGA, especially with the DSP module, FPGAs can realize complex algorithms, which were implemented on digital signal processors previously, in higher speed. Since there are not any floating number operations in H.264 codec, it is possible to realize H.264 coder with FPGA. In this thesis the realization of H.264 coder with FPGA is studied. A scheme based on Altera company's FPGA is provided. The key parts of the scheme are realized with Verilog language. They are video acquisition module, transformation and quantization module and motion estimation module. After verifying the logic with ModelSim, the Verilog source files are synthesized with software QuartusII.