Font Size: a A A

Classification Based Analog IC Router

Posted on:2005-03-27Degree:MasterType:Thesis
Country:ChinaCandidate:J LiangFull Text:PDF
GTID:2168360152967691Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
The research and development of Analog IC router is a great challenge in the field of IC physical design. It is well known that there are two main difficulties, which are numerous constraints of circuits and the irregularity of devices and nets. Although all extant routers try their best to meet them, a variety of constraints and high irregularity in analog circuits are too complex to handle by existed ideas. The Irregularity increases the complexity of routing and simplex routing method is unable to solve various complex constraints. In this paper, we present the classification based analog IC router algorithm and solution, and implement the commercial router. Considering the performance driven method and simplex strategy among traditional algorithms, we transform the performance constraints into the attributes of the nets, and design different routing algorithm according to various net attributes and irregular geometrical requirements. As a result, the layout result is improved significantly with deceased complexity, and thus the performance requirement is well satisfied.According to the characteristic and performance of the circuit, all nets are classified into two main types, critical nets and general nets. Furthermore, critical nets are classified into symmetrical nets, self-symmetrical nets, matching nets, self-matching nets and power/ground nets. Different routing methods are designed for different types of nets. Therefore numerous geometrical and performance constraints and the handicap leaded by the irregularity of routing area and nets are solved successfully. The router adopts single-phase multi-layer area routing and achieves the optimized routing resource. Meanwhile, grid reconstruction helps the router to achieve routing of variable-width nets. Besides, layer-assignment and layer-adjustment, special process for real and virtual obstacles, mapping of obstacles and pins, grid reconstruction, pre-process for nearest source and target search are employed to schedule, assign and utilize the routing resource, and thus the routing for analog IC is well achieved. In order to meet the requirement of commercial analog IC layout system, we design and implement rounded and extensible data structure, object-oriented system architecture and standard system interface. The router has experienced three versions and it can run well in the platform of Windows XP, Sun Solaris 5.8, and Redhat 9.0. Experimental results also demonstrate that the new router achieves high routing success ratio and satisfies performance and constraints of analog circuits well.
Keywords/Search Tags:classification based routing, analog IC router, A* algorithm, maze algorithm, EDA
PDF Full Text Request
Related items