Research On Mismatch Characterization For MOS Analog Devices

In semiconductor manufacturing process, the distribution of the process parameter will affect the structural variations of devices and leads to variations in device characteristics and circuit performances. With the development of semiconductor technology, the feature size is aggressively scaled down, circuit performances are expected to be increasingly sensitive to manufacturing variations.Random device mismatch plays an important role in the design of analog circuits. Device mismatch is resulted from random error of integrated circuits process. So a precise model of MOS transistor is very important in the analysis of analog circuit design. This paper describes some concepts of MOS transistor mismatch characterization in the analog design. With the scaling down of devices sizes, a series short channel effects appear. In order to show the importance of a precise model, the whole history of MOS model is also described in the paper. Also described is the situation that the circuit becomes worse due to the mismatch characterization, which even affects the whole D/A converter. To tackle this problem, an improved technique, which has been verified, is adopted. In order to solve the mismatch of amplifier, a refined layout principle is proposed, and an improved design technique has been used. The circuit simulation is based on the model of 0.25μm CMOS process. Self-calibration current source is used to tackle the mismatch in the current sources module in D/A. The simulation result shows the justification of this refinement.