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The Study Of SiC Layers By Vanadium Ion Implantations

Posted on:2006-06-10Degree:MasterType:Thesis
Country:ChinaCandidate:X F YangFull Text:PDF
GTID:2168360152471479Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
It is discussed that the mechanism and technology of forming semi-insulating layer SiC by vanadium ion implantation in this paper. Firstly, deep levels in band of SiC crystals are studied which has significance to explain the forming of semi-insulating SiC. Vanadium substitute silicon and produce both acceptor level and donor level which can trap residual impurities effectively.The analyses to the results of simulation show that vanadium concentration profile is Gaussian profile. And the way implanting at high temperature can alleviate destructions. High temperature annealing hasn't obvious affect on vanadium re-distribution profile but can make vanadium active so that increasing resistivity.Both high energy and low energy of vanadium implant experiments are presented. The resistivity exceed 1~3×106Ω·cm and 2~4×104Ω·cm for p- and n-type samples, respectively. It has positive effect to increasing the resistivity of n-type SiC that implanting and annealing at low temperature in low energy implantation experiment.
Keywords/Search Tags:SiC, semi-insulating, ion-implanting, vanadium
PDF Full Text Request
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